Semiconductor die are commonly simultaneously processed and formed in the surface of a wafer of silicon or other semiconductor material, and are subsequently separated from one another in a subsequent dicing operation.
If the die conduct vertically between the top and bottom surfaces, the die thickness presents electrical resistance (RDSON). In order to reduce RDSON it is common to thin the wafer, for example from about 350 μm to 50 μm or less.
The wafer thinning operation uses mechanical grinding or wet etching. Both of these processes are complex, time consuming and expensive. Further, excessive or incorrect thinning may lead to weak, fragile, thin wafers that break or fracture easily during production, installation or use.